In integrated circuit manufacturing, a conductive material, such as copper, is often deposited by electroplating onto a conductive seed layer to fill one or more recessed features on the wafer substrate. Electroplating is a method of choice for depositing metal into the vias and trenches of the wafer during damascene processing, and is also used to fill through-silicon vias (TSVs), which are relatively large vertical electrical connections used in 3D integrated circuits and 3D packages. Electroplating may also be used to fill through resist wafer-level packaging (WLP) structures.
During electroplating, electrical contacts are made to the seed layer (typically at the periphery of the wafer), and the wafer is electrically biased to serve as a cathode. The wafer is brought into contact with an electroplating solution, which contains ions of a metal to be plated, and often includes additives that may promote certain fill behavior. Electroplating is typically conducted for an amount of time that is sufficient to fill the recessed features with metal. Then, the unwanted metal deposited on the field region of the wafer is removed in a planarization operation, such as by a chemical mechanical polishing (CMP).